PCB Design - Decoupling Capacitors
更新時間: 2022-07-25 17:35:41
In the design of PCB circuit boards, paying attention to the basic situation to achieve the required functionality of the circuit requires how many wiring layers, ground plane and power plane, and PCB circuit board wiring layers, ground plane and power plane of the establishment of the number of layers, with the basic function of the circuit, signal integrity, EMI, EMC, manufacturing costs and other needs have a relationship.
Relative to the vast majority of designs, PCB circuit board performance requirements, cost, manufacturing technology and system complexity, and other key factors have many conflicting requirements. PCB circuit board stack design is generally a compromise decision after considering all aspects of the key factors. High-speed digital circuits and RF circuits are generally designed to take a multilayer board.
The multilayer PCB circuit board usually contains the signal, power plane and ground plane. The power plane and the ground plane are generally no division of the solid plane. Between them will provide a good low-impedance current return path for the adjacent signal lines.
The signal layer is overwhelmingly between these power or ground reference plane layers, forming symmetrical or asymmetrical strip lines. The top and bottom layers of a multilayer PCB board should generally be used to prevent components, and a small number of alignments, such as the signal alignment requirements, can not be too long to reduce the direct radiation from the alignments.
Determine the single power supply reference plane
The safe use of decoupling capacitors is a critical measure in dealing with power integrity. Decoupling capacitors can only be stored on the top and bottom layers of the PCB.
The decoupling capacitor alignment, pads, and also the over-hole will seriously affect the effectiveness of the decoupling capacitor. Therefore, the alignment of the decoupling capacitors must be designed to be as short and wide as possible, and the wires connected to the vias should also be as short as possible.
Determining the Multi-Power Reference Plane
The multi-power reference plane will be split into several solid areas with different voltages. Suppose the signal layer is immediately adjacent to the multi-power layer. In that case, the signal current on the signal layer in its vicinity may be subject to unsatisfactory return paths, creating gaps in the return path. These flawed return path designs may cause serious problems relative to high-speed digital signals and therefore require high-speed digital signal cabling to be located away from the multi-power reference plane.
Identifying Multiple Ground Reference Planes
Numerous ground reference planes can cause one of the good low-impedance current return paths, which can largely reduce common-mode EMI.
The ground plane and power plane shall be closely coupled, and the signal layer shall also be closely associated with the immediately adjacent reference plane. Reduce the thickness of the dielectric between the layers to facilitate this.
Rational design of wiring combinations
The two layers spanned by one signal path are one [wiring combination]. The most suitable wiring combination design is to avoid return currents that flow from one reference plane to another; instead, they stay from one point (plane) of one reference plane to another end (plane). And to enable complex wiring, interlayer transitions of the alignment are unavoidable. During the signal interlayer transition, it is important to ensure that the return current can flow smoothly from one reference plane to another.
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