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EP2C8Q208I8N

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  • パッケージ :
  • PQFP208
  • 製品 :
  • FPGA - Field Programmable Gate Array
  • RoHs Status:
  • Lead free / RoHS Compliant
  • マーキングコード:
  • EP2C8Q208I8N
  • 在庫:
  • 1061

  

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EP2C8Q208I8N 製品詳細

Functional Description

Cyclone® II devices contain a two-dimensional row- and column-based architecture to implement custom logic. Column and row interconnects of varying speeds provide signal interconnects between logic array blocks (LABs), embedded memory blocks, and embedded multipliers. 

The logic array consists of LABs, with 16 logic elements (LEs) in each LAB. An LE is a small unit of logic providing efficient implementation of user logic functions. LABs are grouped into rows and columns across the device. Cyclone II devices range in density from 4,608 to 68,416 LEs.

Cyclone II devices provide a global clock network and up to four phase-locked loops (PLLs). The global clock network consists of up to 16 global clock lines that drive throughout the entire device. The global clock network can provide clocks for all resources within the device, such as input/output elements (IOEs), LEs, embedded multipliers, and embedded memory blocks. The global clock lines can also be used for other high fan-out signals. Cyclone II PLLs provide general-purpose clocking with clock synthesis and phase shifting as well as external outputs for high-speed differential I/O support.

M4K memory blocks are true dual-port memory blocks with 4K bits of memory plus parity (4,608 bits). These blocks provide dedicated true dual-port, simple dual-port, or single-port memory up to 36-bits wide at up to 260 MHz. These blocks are arranged in columns across the device in between certain LABs. Cyclone II devices offer between 119 to 1,152 Kbits of embedded memory.

Each embedded multiplier block can implement up to either two 9 × 9-bit multipliers, or one 18 × 18-bit multiplier with up to 250-MHz performance. Embedded multipliers are arranged in columns across the device.

Each Cyclone II device I/O pin is fed by an IOE located at the ends of LAB rows and columns around the periphery of the device. I/O pins support various single-ended and differential I/O standards, such as the 66- and 33-MHz, 64- and 32-bit PCI standard, PCI-X, and the LVDS I/O standard at a maximum data rate of 805 megabits per second (Mbps) for inputs and 640 Mbps for outputs. Each IOE contains a bidirectional I/O buffer and three registers for registering input, output, and output-enable signals. Dual-purpose DQS, DQ, and DM pins along with delay chains (used to  phase-align double data rate (DDR) signals) provide interface support for external memory devices such as DDR, DDR2, and single data rate (SDR) SDRAM, and QDRII SRAM devices at up to 167 MHz. 

Features

■ High-density architecture with 4,608 to 68,416 LEs
● M4K embedded memory blocks
● Up to 1.1 Mbits of RAM available without reducing available logic
● 4,096 memory bits per block (4,608 bits per block including 512 parity bits)
● Variable port configurations of ×1, ×2, ×4, ×8, ×9, ×16, ×18, ×32,and ×36
● True dual-port (one read and one write, two reads, or two writes) operation for ×1, ×2, ×4, ×8, ×9, ×16, and ×18 modes
● Byte enables for data input masking during writes
● Up to 260-MHz operation
■ Embedded multipliers
● Up to 150 18- × 18-bit multipliers are each configurable as two independent 9- × 9-bit multipliers with up to 250-MHz performance
● Optional input and output registers
■ Advanced I/O support
● High-speed differential I/O standard support, including LVDS,RSDS, mini-LVDS, LVPECL, differential HSTL, and differential SSTL
● Single-ended I/O standard support, including 2.5-V and 1.8-V,SSTL class I and II, 1.8-V and 1.5-V HSTL class I and II, 3.3-V PCIand PCI-X 1.0, 3.3-, 2.5-, 1.8-, and 1.5-V LVCMOS, and 3.3-, 2.5-,and 1.8-V LVTTL
● Peripheral Component Interconnect Special Interest Group (PCISIG) PCI Local Bus Specification, Revision 3.0 compliance for 3.3-V operation at 33 or 66 MHz for 32- or 64-bit interfaces
● PCI Express with an external TI PHY and an Altera PCI Express ×1 Megacore® function

● 133-MHz PCI-X 1.0 specification compatibility
● High-speed external memory support, including DDR, DDR2,and SDR SDRAM, and QDRII SRAM supported by drop in Altera IP MegaCore functions for ease of use
● Three dedicated registers per I/O element (IOE): one input register, one output register, and one output-enable register
● Programmable bus-hold feature
● Programmable output drive strength feature
● Programmable delays from the pin to the IOE or logic array
● I/O bank grouping for unique VCCIO and/or VREF bank settings
● MultiVolt™ I/O standard support for 1.5-, 1.8-, 2.5-, and 3.3-interfaces
● Hot-socketing operation support
● Tri-state with weak pull-up on I/O pins before and during configuration
● Programmable open-drain outputs
● Series on-chip termination support
■ Flexible clock management circuitry
● Hierarchical clock network for up to 402.5-MHz performance
● Up to four PLLs per device provide clock multiplication and division, phase shifting, programmable duty cycle, and external clock outputs, allowing system-level clock management and skew control
● Up to 16 global clock lines in the global clock network that drive throughout the entire device
■ Device configuration
● Fast serial configuration allows configuration times less than 100 ms
● Decompression feature allows for smaller programming file storage and faster configuration times
● Supports multiple configuration modes: active serial, passive serial, and JTAG-based configuration
● Supports configuration through low-cost serial configuration devices
● Device configuration supports multiple voltages (either 3.3, 2.5,or 1.8 V)
■ Intellectual property
● Altera megafunction and Altera MegaCore function support,and Altera Megafunctions Partners Program (AMPPSM) megafunction support, for a wide range of embedded processors, on-chip and off-chip interfaces, peripheral functions, DSP functions, and communications functions and protocols. Visit the Altera IPMegaStore at www.altera.com to download IP MegaCore functions. 

● Nios II Embedded Processor support

EP2C8Q208I8N

アプリケーション/パラメータの範囲

The Cyclone II device family offers the following features:

■ High-density architecture with 4,608 to 68,416 LEs

● M4K embedded memory blocks

● Up to 1.1 Mbits of RAM available without reducing available logic

● 4,096 memory bits per block (4,608 bits per block including 512 parity bits)

● Variable port configurations of ×1, ×2, ×4, ×8, ×9, ×16, ×18, ×32, and ×36

● True dual-port (one read and one write, two reads, or two writes) operation for ×1, ×2, ×4, ×8, ×9, ×16, and ×18 modes

● Byte enables for data input masking during writes

● Up to 260-MHz operation

■ Embedded multipliers

● Up to 150 18- × 18-bit multipliers are each configurable as two independent 9- × 9-bit multipliers with up to 250-MHz performance

● Optional input and output registers

EP2C8Q208I8N 製品

EP2C8Q208I8N Block Diagram
(商品画像: Diagram)

技術的パラメータ

  • Series
  • Cyclone II
  • Number of Logic Blocks
  • 516
  • Embedded Block RAM EBR
  • 166 kbit
  • Number of I/Os
  • 138
  • Operating Supply Voltage
  • 1.15 V to 1.25 V
  • Maximum Operating Temperature
  • + 85 C
  • Mounting Style
  • SMD/SMT
  • Package / Case
  • QFP-208
  • Distributed RAM
  • 166 kbit
  • Minimum Operating Temperature
  • - 40 C
  • Packaging
  • Tray

EP2C8Q208I8N Documents

EP2C8Q208I8N 特殊な製品に関連する

Ratings and Reviews (1)

  • 5 / 5
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  • **xele***
    2020-03-28

    Very happy spot on

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All the products will packing in anti-staticbag. Ship with ESD antistatic protection.

Outside ESD packing’s lable will use ourcompany’s information: Part Mumber, Brand and Quantity.

We will inspect all the goods before shipment,ensure all the products at good condition and ensure the parts are new originalmatch datasheet.

After all the goods are ensure no problems afterpacking, we will packing safely and send by global express. It exhibitsexcellent puncture and tear resistance along with good seal integrity.

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保証

1.We provide 90 days warranty.

2.If some of the items you received aren't of perfect quality, we would resiponsibly arrange your refund or replacement. But the items must remain their orginal condition.

FAQ:

Q: How does Jotrin guarantee that EP2C8Q208I8N is the original manufacturer or agent of INTEL?
We have a professional business development department to strictly test and verify the qualifications of INTEL original manufacturers and agents. All INTEL suppliers must pass the qualification review before they can publish their EP2C8Q208I8N devices; we pay more attention to the channels and quality of EP2C8Q208I8N products than any other customer. We strictly implement supplier audits, so you can purchase with confidence.
Q: How to find the detailed information of EP2C8Q208I8N chips? Including INTEL original factory information, FPGA - Field Programmable Gate Array application, EP2C8Q208I8N pictures?
You can use Jotrin's intelligent search engine, or filter by Cyclone II FPGA category, or find it through Intel Corp Information page.
Q: Are the INTEL's EP2C8Q208I8N price and stock displayed on the platform accurate?
The INTEL's inventory fluctuates greatly and cannot be updated in time, it will be updated periodically within 24 hours. After submitting an order for EP2C8Q208I8N, it is recommended to confirm the order with Jotrin salesperson or online customer service before payment.
Q: Can I place an order offline?
Yes. We accept offline orders.
We can provide order placement service. You only need to log in, click "My Orders" to enter the transaction management, and you will see the "Order Details" interface. After checking it, select all and click "Place Order". In addition, you can enjoy coupons or other selected gifts when placing orders online.
Q: What forms of payment can I use in Jotrin?
TT Bank, Paypal, Credit Card, Western Union, and Escrow is all acceptable.
Q: How is the shipping arranged and track my package?
Customers can choose industry-leading freight companies, including DHL, FedEx, UPS, TNT, and Registered Mail.
Once your order has been processed for shipment, our sales will send you an e-mail advising you of the shipping status and tracking number.
Note: It may take up to 24 hours before carriers will display tracking information. In normal conditions, Express delivery needs 3-5 days, Registered Mail needs 25-60 days.
Q: What is the process for returns or replacement of EP2C8Q208I8N?
All goods will implement Pre-Shipment Inspection (PSI), selected at random from all batches of your order to do a systematic inspection before arranging the shipment. If there is something wrong with the EP2C8Q208I8N we delivered, we will accept the replacement or return of the EP2C8Q208I8N only when all of the below conditions are fulfilled:
(1)Such as a deficiency in quantity, delivery of wrong items, and apparent external defects (breakage and rust, etc.), and we acknowledge such problems.
(2)We are informed of the defect described above within 90 days after the delivery of EP2C8Q208I8N.
(3)The EP2C8Q208I8N is unused and only in the original unpacked packaging.
Two processes to return the products:
(1)Inform us within 90 days
(2)Obtain Requesting Return Authorizations
More details about return electronic components please see our Return & Change Policy.
Q: How to contact us and get support, such as EP2C8Q208I8N datasheet pdf, EP2C8 pin diagram?
Need any After-Sales service, please feel free contact us: sales@jotrin.com

Intel Corp

Intel
Intel Corporation is the world's largest semiconductor chip maker. Intel has been committed to the development of small, fast and energy-saving technologies to help mobile computing, desktop computin and data centers to achieve revolutionary advances in computing, and to promote fundamental changes...
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